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Data Sheet
by writing to the STATUS0 register with the corresponding bit
set to 1.
Setting Bit 6 (RSTREAD) of the LCYCMODE register enables a
ZXSEL[0] IN
LCYCMODE[7:0]
ZERO-
CROSSING
DETECTION
(PHASE A)
ADE7880
read-with-reset for all xVAHR accumulation registers, that is,
the registers are reset to 0 after a read operation.
Integration Time Under Steady Load
The discrete time sample period for the accumulation register
is 976.5625 ns (1.024 MHz frequency). With full-scale pure
sinusoidal signals on the analog inputs, the average word value
representing the apparent power is PMAX. If the VATHR
ZXSEL[1] IN
LCYCMODE[7:0]
ZERO-
CROSSING
DETECTION
(PHASE B)
ZXSEL[2] IN
LCYCMODE[7:0]
ZERO-
CROSSING
DETECTION
(PHASE C)
LINECYC[15:0]
CALIBRATION
CONTROL
= 14 . 531 μ sec
PMAX × 1 . 024 × 10 6
threshold register is set at 3, its minimum recommended value,
the first stage accumulator generates a pulse that is added to the
3 × 2 27
xVAHR registers every
The maximum value that can be stored in the xVAHR
AIRMS
AVRMS
APGAIN
INTERNAL
ACCUMULATOR
THRESHOLD
AVAHR[31:0]
32-BIT REGISTER
accumulation register before it overflows is 2 31 ? 1 or
0x7FFFFFFF. The integration time is calculated as
34
VATHR
27 26
0
0
Time = 0x7FFFFFFF × 14.531 μs = 8 hr 40 min 6 sec
(46)
Figure 80. Line Cycle Apparent Energy Accumulation Mode
In a 3-phase three wire case (CONSEL[1:0] = 01), the ADE7880 computes the
Energy Accumulation Mode
The apparent power accumulated in each accumulation register
depends on the configuration of Bits[5:4] (CONSEL[1:0]) in the
ACCMODE register. The various configurations are described
Table 19. Inputs to VA-Hour Accumulation Registers
CONSEL[1:0] AVAHR BVAHR CVAHR
00 AVRMS × AIRMS BVRMS × BIRMS CVRMS × CIRMS
01 AVRMS × AIRMS BVRMS × BIRMS CVRMS × CIRMS
VB = VA – VC 1
10 AVRMS × AIRMS BVRMS × BIRMS CVRMS × CIRMS
VB = ?VA ? VC
11 AVRMS × AIRMS BVRMS × BIRMS CVRMS × CIRMS
VB = ?VA
1
rms value of the line voltage between Phase A and Phase C and stores the
Delta Configurations section). Consequently, the ADE7880 computes powers
associated with Phase B that do not have physical meaning. To avoid any
errors in the frequency output pins (CF1, CF2, or CF3) related to the powers
associated with Phase B, disable the contribution of phase B to the energy to
frequency converters by setting bits TERMSEL1[1] or TERMSEL2[1] or
TERMSEL3[1] to 0 in COMPMODE register (see the Energy-to-Frequency
Conversion section).
Line Cycle Apparent Energy Accumulation Mode
Mode section, in line cycle energy accumulation mode, the
energy accumulation can be synchronized to the voltage channel
zero crossings allowing apparent energy to be accumulated over an
integral number of half line cycles. In this mode, the ADE7880
transfers the apparent energy accumulated in the 32-bit internal
accumulation registers into the xVAHR registers after an
integral number of line cycles, as shown in Figure 80. The
number of half line cycles is specified in the LINECYC register.
The line cycle apparent energy accumulation mode is activated
by setting Bit 2 (LVA) in the LCYCMODE register. The apparent
energy accumulated over an integer number of zero crossings is
written to the xVAHR accumulation registers after the number
of zero crossings specified in LINECYC register is detected. When
using the line cycle accumulation mode, set Bit 6 (RSTREAD) of
the LCYCMODE register to Logic 0 because a read with the reset of
xVAHR registers is not available in this mode.
Phase A, Phase B, and Phase C zero crossings are, respectively,
included when counting the number of half line cycles by setting
Bits[5:3] (ZXSEL[x]) in the LCYCMODE register. Any combi-
nation of the zero crossings from all three phases can be used
for counting the zero crossing. Select only one phase at a time
for inclusion in the zero-crossings count during calibration.
For details on setting the LINECYC register and Bit 5 (LENERGY)
in the MASK0 interrupt mask register associated with the line
Accumulation Mode section.
POWER FACTOR CALCULATION
The ADE7880 provides a direct power factor measurement
simultaneously on all phases. Power factor in an ac circuit is
defined as the ratio of the total active power flowing to the load
to the apparent power. The absolute power factor measurement
is defined in terms of leading or lagging referring to whether the
current is leading or lagging the voltage waveform. When the
current is leading the voltage, the load is capacitive and this is
defined as a negative power factor. When the current is lagging
the voltage, the load is inductive and this defined as a positive
power factor. The relationship of the current to the voltage
Rev. A | Page 55 of 104
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